Post-Quantum Cryptography Acceleration for Edge Computing 

As quantum computing continues to evolve, existing public-key cryptographic schemes are becoming increasingly vulnerable. To address this, the SMARTY Project is advancing hardware acceleration for Post-Quantum Cryptography (PQC) within edge computing environments. 

Led by BSC, the effort focuses on integrating PQC capabilities into the SELENE SoC, a RISC-V-based platform, using High-Level Synthesis (HLS) to accelerate the development of hardware modules that implement two NIST standardization candidates: 

  • ML-KEM (FIPS-203) for key encapsulation 
  • ML-DSA (FIPS-204) for digital signatures 

Design Highlights 

  • Shared Modular Architecture
    The accelerator design reuses common components—such as polynomial arithmetic blocks—across both schemes, improving area efficiency and design scalability. 
  • Pipelined Execution
    Each cryptographic function is broken down into hardware modules that execute in parallel. This approach improves throughput and reduces latency, which is critical for real-time, security-sensitive applications at the edge. 
  • HLS-Based Development
    The use of HLS tools allows rapid conversion of C/C++ descriptions into synthesizable HDL, enabling fast prototyping and iteration. 

System Integration 

The accelerator connects to the SELENE SoC through a Network-on-Chip (NoC) using the AXI4-Full protocol for high-bandwidth data transfer, and AXI4-Lite for configuration and control. This setup supports: 

  • Simultaneous memory access for key exchange, signature, and verification 
  • Fine-grained control over operational modes and memory pointers 
  • Compatibility with interrupt and polling-based signaling 

Interfaces & Configuration 

Both ML-KEM and ML-DSA accelerators expose: 

  • AXI-Lite control interfaces: Manage operation mode, start/stop triggers, buffer pointers, and interrupt handling 
  • AXI-Full data interfaces: Enable high-throughput access to cryptographic inputs and outputs (e.g., keys, messages, ciphertext) 

This unified interface structure simplifies integration into broader firmware stacks and promotes code reuse. 

Applications 

This PQC acceleration framework is specifically designed for: 

  • Edge AI platforms 
  • Autonomous systems 
  • Secure embedded applications 

The architecture ensures the system remains responsive and energy-efficient even under cryptographic workloads, aligning with SMARTY’s goals of secure, cloud-native, AI-enabled infrastructure. 

🔗 To explore the technical foundation and stay updated: 
https://www.smarty-project.eu 

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