1308, 2025

SAFE-SU: A Modular Performance Monitor Unit for Secure Hardware Acceleration 

The SMARTY Project has developed SafeSU, a Performance Monitor Unit (PMU) designed to enhance observability and controllability in secure hardware accelerators. SafeSU is AMBA AHB/AXI-compliant and integrates with multicore systems to monitor and manage contention, latency, and resource usage in real time.  Core Functionality  SafeSU consists of three key components:  Interfaces & Programmability   Key Features  Applications  SafeSU is particularly valuable in secure SoC designs, where real-time monitoring of multicore interference

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0608, 2025

W-Band Wireless Prototype: Advancing Quantum-Resistant Communications  

The SMARTY Project is progressing toward a secure, high-speed, short-range wireless link through the development of a W-band prototype (75–110 GHz). This forms a key component of a quantum-resistant transceiver tailored for edge environments where secure communication is required but wired infrastructure is not available.  W-Band Prototype: Current Status  The initial laboratory setup has demonstrated a unidirectional uplink (UL) over a wireless W-band path, while the downlink (DL) remains fiber-based. 

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3107, 2025

Building a Quantum-Resistant Transceiver for High-Speed, Secure Wireless Communication 

The SMARTY Project is advancing secure communications with the development of a quantum-resistant transceiver designed for short-range, high-speed wireless links. This innovation targets edge computing scenarios where fiber connections are unavailable or impractical, and secure, low-latency data exchange is critical.  Technical Overview:  Led by TUE, the prototype transceiver operates in the W-band (75–110 GHz) and is designed for chip-to-chip and short-range node communication. A J-band (220–330 GHz) version is also

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